STM32F415OG datasheet(142/186 Pages) STMICROELECTRONICS

142 / 186 page

Electrical characteristics

STM32F415xx, STM32F417xx

142/186

DocID022063 Rev 4

Figure 58. Asynchronous multiplexed PSRAM/NOR write waveforms

tv(NADV_NE) FSMC_NEx low to FSMC_NADV low

tw(NADV)

FSMC_NADV low time

THCLK– 2

THCLK+1

th(AD_NADV)

FSMC_AD(adress) valid hold time after

FSMC_NADV high)

THCLK

-ns

th(A_NOE)

Address hold time after FSMC_NOE high

THCLK–1

th(BL_NOE)

FSMC_BL time after FSMC_NOE high

tv(BL_NE)

FSMC_NEx low to FSMC_BL valid

tsu(Data_NE) Data to FSMC_NEx high setup time

THCLK+4

tsu(Data_NOE) Data to FSMC_NOE high setup time

THCLK+4

th(Data_NE) Data hold time after FSMC_NEx high

th(Data_NOE) Data hold time after FSMC_NOE high

1. CL = 30 pF.

2. Based on characterization, not tested in production.

Table 78. Asynchronous multiplexed PSRAM/NOR write timings(1)(2)

Symbol

Parameter

Min

Max

Unit

tw(NE)

FSMC_NE low time

4THCLK–0.5

4THCLK+3

tv(NWE_NE)

FSMC_NEx low to FSMC_NWE low

THCLK–0.5

THCLK -0.5

tw(NWE)

FSMC_NWE low tim e

2THCLK–0.5

2THCLK+3

Table 77. Asynchronous multiplexed PSRAM/NOR read timings(1)(2) (continued)

NBL

Data

FSMC_NEx

FSMC_NBL[1:0]

FSMC_AD[15:0]

tv(BL_NE)

th(Data_NWE)

FSMC_NOE

Address

FSMC_A[25:16]

tv(A_NE)

tw(NWE)

FSMC_NWE

tv(NWE_NE)

t h(NE_NWE)

th(A_NWE)

th(BL_NWE)

t v(A_NE)

tw(NE)

ai14891B

Address

FSMC_NADV

t v(NADV_NE)

tw(NADV)

t v(Data_NADV)

th(AD_NADV)

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