DSPIC33FJMC302ESS datasheet(185/330 Pages) MICROCHIP

185 / 330 page

DS70283K-page 185

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

18.0 INTER-INTEGRATED

CIRCUIT™ (I2C™)

The Inter-Integrated Circuit (I2C) module provides

complete hardware support for both Slave and

Multi-Master modes of the I2C serial communication

standard, with a 16-bit interface.

The I2C module has a 2-pin interface:

• The SCLx pin is clock

• The SDAx pin is data

The I2C module offers the following key features:

•I2C interface supporting both Master and Slave

modes of operation

•I2C Slave mode supports 7-bit and 10-bit

addressing

•I2C Master mode supports 7-bit and 10-bit

addressing

•I2C port allows bidirectional transfers between

master and slaves

• Serial clock synchronization for I2C port can be

used as a handshake mechanism to suspend and

resume serial transfer (SCLREL control)

•I2C supports multi-master operation, detects bus

collision and arbitrates accordingly

18.1

Operating Modes

The hardware fully implements all the master and slave

functions of the I2C Standard and Fast mode

specifications, as well as 7-bit and 10-bit addressing.

The I2C module can operate either as a slave or a

master on an I2C bus.

The following types of I2C operation are supported:

•I2C slave operation with 7-bit addressing

•I2C slave operation with 10-bit addressing

•I2C master operation with 7-bit or 10-bit addressing

For details about the communication sequence in each

of these modes, refer to the “dsPIC33F/PIC24H Family

Reference Manual”. Please see the Microchip web site

(www.microchip.com) for the latest dsPIC33F/PIC24H

Family Reference Manual sections.

Note 1: This data sheet summarizes the features

of the dsPIC33FJ32MC202/204 and

dsPIC33FJ16MC304 family of devices. It

is not intended to be a comprehensive

reference source. To complement the

information in this data sheet, refer to

Section 19. “Inter-Integrated Circuit™

(I2C™)”

(DS70195)

the

“dsPIC33F/PIC24H Family Reference

Manual”, which is available from the

Microchip website (www.microchip.com).

2: Some registers and associated bits

described in this section may not be

available on all devices. Refer to

Section 4.0 “Memory Organization” in

this data sheet for device-specific register

and bit information.

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