WAU8822 Data Sheet Rev 0.86

Page 7 of 21

September 4, 2008

Electrical Characteristics, cont’d.

Conditions: VDDC = 1.8V, VDDA = VDDB = VCCSPK = 3.3V, MCLK = 12.88MHz,

Parameter

Symbol

Comments/Conditions

Min

Typ

Max

Units

Automatic Level Control (ALC) & Limiter: ADC path only

Target record level

-22.5

-1.5

dBFS

Programmable gain

-12

35.25

dB

Gain hold time

3

Doubles every gain step,

with 16 steps total

0 / 2.67 / 5.33 / … / 43691

ms

Gain ramp-up (decay)

3

ALC Mode

ALC = 0

4 / 8 / 16 / … / 4096

ms

Limiter Mode

ALC = 1

1 / 2 / 4 / … / 1024

ms

Gain ramp-down (attack)

3

ALC Mode

ALC = 0

1 / 2 / 4 / … / 1024

ms

Limiter Mode

ALC = 1

0.25 / 0.5 / 1 / … / 128

ms

Mute Attenuation

120

dB

Microphone Bias

Bias voltage

See Figure 3

0.50, 0.60,0.65, 0.70,

0.75, 0.85, or 0.90

VDDA

VDDA

Bias current source

3

mA

Output noise voltage

1kHz to 20kHz

14

nV/√Hz

Digital Input/Output

Input HIGH level

0.7 *

VDDC

V

Input LOW level

0.3 *

VDDC

V

Output HIGH level

0.9 *

VDDC

V

Output LOW level

0.1 *

VDDC

V

Input capacitance

10

pF

Notes

1. Full Scale is relative to the magnitude of VDDA and can be calculated as FS = VDDA/3.3.

2. Distortion is measured in the standard way as the combined quantity of distortion products plus noise. The signal level for

distortion measurements is at 3dB below full scale, unless otherwise noted.

3. Time values scale proportionally with MCLK. Complete descriptions and definitions for these values are contained in the

detailed descriptions of the ALC functionality.

4. With default register settings, SPKVDD should be 1.5xVDDA (but not exceeding maximum recommended operating

voltage) to optimize available dynamic range in the AUXOUT1, AUXOU2, RSPKOUT, and LSPKOUT outputs stages.