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ST7MC2S4TC 数据表(PDF) 252 Page - STMicroelectronics |
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ST7MC2S4TC 数据表(HTML) 252 Page - STMicroelectronics |
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252 / 308 page ![]() ST7MC1/ST7MC2 252/308 SUPPLY CURRENT CHARACTERISTICS (Cont’d) 12.4.2 WAIT and SLOW WAIT Modes Figure 133. Typical IDD in WAIT vs. fCPU Figure 134. Typical IDD in SLOW-WAIT vs. fCPU Notes: 1. Data based on characterization results, tested in production at VDD max. and fCPU max. 2. Measurements are done in the following conditions: - Program executed from RAM, CPU running with RAM access. The increase in consumption when executing from Flash is 50%. - All I/O pins in input mode with a static value at VDD or VSS (no load) - All peripherals in reset state. - LVD disabled. - Clock input (OSC1) driven by external square wave. - In SLOW and SLOW WAIT mode, fCPU is based on fOSC divided by 32. To obtain the total current consumption of the device, add the clock source (Section 12.5.3) and the peripheral power consumption. Symbol Parameter Conditions Typ Max 1) Unit IDD Supply current in WAIT mode 2) (see Figure 133) fOSC=16MHz, fCPU=8MHz 812 mA Supply current in SLOW WAIT mode 2) (see Figure 134) fOSC=16MHz, fCPU=500kHz 3.5 5 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 01 23 4 5 6 7 8 Fcpu Mhz 0.0 0.5 1.0 1.5 2.0 2.5 01 23 45 67 8 Fcpu Mhz |
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