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STM32F427AI 数据表(PDF) 142 Page - STMicroelectronics |
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STM32F427AI 数据表(HTML) 142 Page - STMicroelectronics |
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142 / 239 page ![]() Electrical characteristics STM32F427xx STM32F429xx 142/238 DocID024030 Rev 9 SPI interface characteristics Unless otherwise specified, the parameters given in Table 62 for the SPI interface are derived from tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 17, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 10 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5VDD Refer to Section 6.3.17: I/O port characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO for SPI). Table 61. I2C analog filter characteristics(1) 1. Guaranteed by design. Symbol Parameter Min Max Unit tAF Maximum pulse width of spikes that are suppressed by the analog filter 50(2) 2. Spikes with widths below tAF(min) are filtered. 260(3) 3. Spikes with widths above tAF(max) are not filtered ns Table 62. SPI dynamic characteristics(1) Symbol Parameter Conditions Min Typ Max Unit fSCK 1/tc(SCK) SPI clock frequency Master mode, SPI1/4/5/6, 2.7 V≤VDD≤3.6 V -- 45 MHz Slave mode, SPI1/4/5/6, 2.7 V≤VDD≤3.6 V Receiver 45 Transmitter/ full-duplex 38(2) Master mode, SPI1/2/3/4/5/6, 1.7 V≤VDD≤3.6 V -- 22.5 Slave mode, SPI1/2/3/4/5/6, 1.7 V≤VDD≤3.6 V 22.5 Duty(SCK) Duty cycle of SPI clock frequency Slave mode 30 50 70 % |
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