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STM32F439VG 数据表(PDF) 233 Page - STMicroelectronics |
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STM32F439VG 数据表(HTML) 233 Page - STMicroelectronics |
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233 / 240 page ![]() DocID024244 Rev 10 233/240 STM32F437xx and STM32F439xx Application block diagrams 233 Figure 109. RMII with a 25 MHz crystal and PHY with PLL 1. fHCLK must be greater than 25 MHz. 2. The 25 MHz (PHY_CLK) must be derived directly from the HSE oscillator, before the PLL block. |
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