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R5F100JF 数据表(PDF) 175 Page - Renesas Technology Corp |
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R5F100JF 数据表(HTML) 175 Page - Renesas Technology Corp |
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175 / 202 page ![]() RL78/G13 3. ELECTRICAL SPECIFICATIONS (G: INDUSTRIAL APPLICATIONS TA = -40 to +105 C) Page 175 of 196 R01DS0131EJ0330 Rev.3.30 Mar 31, 2016 3.6.5 Power supply voltage rising slope characteristics (TA = 40 to +105C, VSS = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Power supply voltage rising slope SVDD 54 V/ms Caution Make sure to keep the internal reset state by the LVD circuit or an external reset until VDD reaches the operating voltage range shown in 3.4 AC Characteristics. 3.7 RAM Data Retention Characteristics (TA = 40 to +105°C, VSS = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Data retention supply voltage VDDDR 1.44 Note 5.5 V Note This depends on the POR detection voltage. For a falling voltage, data in RAM are retained until the voltage reaches the level that triggers a POR reset but not once it reaches the level at which a POR reset is generated. VDD STOP instruction execution Standby release signal (interrupt request) STOP mode RAM data retention VDDDR Operation mode |
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