Description
The HDMP-0452 is a Quad Port Bypass Circuit (PBC) with a Clock and Data Recovery (CDR) circuit included. This device minimizes part count, cost and jitter accumulation while repeating incoming signals. Port Bypass Circuits are used in hard disk arrays constructed in Fibre Channel Arbitrated Loop (FC-AL) configurations. By using Port Bypass Circuits, hard disks may be pulled out or swapped while other disks in the array are available to the system.

Features
• Supports 1.0625 GBd fibre channel operation
• Supports 1.25 GBd Gigabit Ethernet (GE) operation
• Quad PBC/CDR in one package
• CDR location determined by choice of cable input/output
• Valid amplitude detection on FM_NODE[0] input
• Equalizers on all inputs
• High speed LVPECL I/O
• Buffered Line Logic (BLL) outputs (no external bias resistors required)
• 0.66 W typical power at VCC = 3.3 V
• 44 pin, 10 mm, low cost plastic QFP package

Applications
• RAID, JBOD, BTS cabinets
• 1 => 1-4 serial buffer with or w/o CDR