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LAN91C96 数据表 (PDF) - SMSC Corporation

LAN91C96 Datasheet PDF - SMSC Corporation
部件名 LAN91C96
下载  LAN91C96 下载

文件大小   775.84 Kbytes
  125 Pages
制造商  SMSC [SMSC Corporation]
网页  http://www.smsc.com
标志 SMSC - SMSC Corporation
功能描述 Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet

LAN91C96 Datasheet (PDF)

Go To PDF Page 下载 数据表
LAN91C96 Datasheet PDF - SMSC Corporation

部件名 LAN91C96
下载  LAN91C96 Click to download

文件大小   775.84 Kbytes
  125 Pages
制造商  SMSC [SMSC Corporation]
网页  http://www.smsc.com
标志 SMSC - SMSC Corporation
功能描述 Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet

LAN91C96 数据表 (HTML) - SMSC Corporation

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LAN91C96 产品详情

General Description

The LAN91C96 is a VLSI Ethernet Controller that combines Local Bus, PCMCIA, and Motorola 68000 bus interfaces in one chip. LAN91C96 integrates all MAC and physical layer functions, as well as the packet RAM, needed to implement a high performance 10BASE-T (twisted pair) node. For 10BASE5 (thick coax), 10BASE2 (thin coax), and 10BASE-F (fiber) implementations, the LAN91C96 interfaces to external transceivers via the provided AUI port. Only one additional IC is required for most applications. The LAN91C96 comes with Full Duplex Switched Ethernet (FDSWE) support allowing the controller to provide much higher throughput. 6K bytes of RAM is provided to support enhanced throughput and compensate for any increased system service latencies. The controller implements multiple advanced power-down modes including Magic Packet to conserve power and operate more efficiently. The LAN91C96 can directly interface with the Local Bus, PCMCIA, and 68000 buses and deliver no-wait-state operation. For Local Bus and PCMCIA interfaces, the LAN91C96 occupies 16 I/0 locations and no memory space except for PCMCIA attribute memory space. The sameI/O space is used for both LOCAL BUS and PCMCIA operations. 



Product Features

Non-PCI Single-Chip Ethernet Controller

A Subset of Motorola 68000 Bus Interface Support

Fully Supports Full Duplex Switched Ethernet

Supports Enhanced Transmit Queue Management

6K Bytes of On-Chip RAM

Supports IEEE 802.3 (ANSI 8802-3) Ethernet Standards

Automatic Detection of TX/RX Polarity Reversal

Enhanced Power Management Features

Supports “Magic Packet” Power Management Technology

Simultasking Early Transmit and Early Receive Functions

Enhanced Early Transmit Function

Receive Counter for Enhanced Early Receive

Hardware Memory Management Unit Optional Configuration via Serial EEPROM Interface (Jumperless)

Supports single +5V or +3.3V (for Revisions E and Later) VCC Designs

Supports Mixed Voltage External PHY Designs1

Low Power CMOS Design

100 Pin QFP and TQFP (1.0 mm body Thickness) Packages

Pin Compatible with the LAN91C92 and LAN91C94




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