Description
The 8V41N012A is a PLL-based clock generator specifically
designed for Cavium Networks Octeon II processors. This
high-performance device is optimized to generate the processor
core reference clock, the PCI-Express, sRIO, XAUI, SerDes
reference clocks, and the clocks for both the Gigabit Ethernet
MAC and PHY. The output frequencies are generated from a
25MHz external input source or an external 25MHz parallel
resonant crystal.
The industrial temperature range of the 8V41N012A supports
telecommunication, networking, and storage requirements.

Features
▪ Ten selectable 100MHz, 125MHz, 156.25MHz and 312.5MHz
clocks for PCI Express, sRIO, and GbE, HCSL interface levels
▪ One single-ended QG LVCMOS/LVTTL clock output at 125MHz
▪ One single-ended QF LVCMOS/LVTTL clock output at 50MHz
▪ Two single-ended QREFx LVCMOS/LVTTL outputs at 25MHz
▪ Selectable external crystal or differential (single-ended)
input source
▪ Crystal oscillator interface designed for 25MHz, parallel
resonant crystal
▪ Differential CLK, nCLK input pair that can accept: LVPECL,
LVDS, LVHSTL, and HCSL input levels
▪ Internal resistor bias on nCLK pin allows the user to drive CLK
input with external single-ended (LVCMOS/ LVTTL) input levels
▪ Supply Modes, (125MHz QG output and 25MHz QREFx
outputs):
• Core / Output
• 3.3V / 3.3V
• 3.3V / 2.5V
▪ Supply Modes, (HCSL outputs, and 50MHz QF output):
• Core / Output
• 3.3V / 3.3V
▪ -40°C to 85°C ambient operating temperature
▪ 10 x 10 mm 72-VFQFPN, lead-free (RoHS 6) packaging