Key Specifications:
• PCIe Gen 2 compliant SRC outputs
• QPI & FBD 2 compliant CPU clocks
• CPU cycle-cycle jitter: < 50ps
• SRC cycle-cycle jitter: < 125ps
• PCI cycle-cycle jitter: < 500ps
• CPU output skew: < 50ps
• SRC output skew: < 250ps
• ± 100ppm frequency accuracy on all outputs
Output Features:
• 4 - 0.7V current-mode differential CPU pairs
• 5 - 0.7V current-mode differential SRC pair
• 4 - PCI (33MHz)
• 3 - PCICLK_F, (33MHz) free-running
• 1 - 48MHz
• 2 - REF, 14.318MHz
Features/Benefits:
• Supports spread spectrum modulation, 0 to -0.5%
down spread
• Uses external 14.318MHz crystal and external load
capacitors for low ppm synthesis error
• CPU clocks independent of SRC/PCI clocks
• D2/D3 SMBus address