GENERAL DESCRIPTION
The MT5C6401 is organized as a 65,556 x 1 SRAM using a four-transistor memory cell with a high-speed, low-power CMOS process. Micron SRAMs are fabricated using double-layer metal, double-layer polysilicon technology.

FEATURES
• High speed: 9, 10, 12, 15, 20 and 25ns
• High-performance, low-power, CMOS double-metal process
• Single +5V ±10% power supply
• Easy memory expansion with /C/E option
• All inputs and outputs are TTL-compatible