Product Description
The PI6C2501 features a low-skew, low-jitter, phase-locked loop (PLL) clock driver. By connecting the CLK_OUT output to the feedback FB_IN input, the propagation delay from the CLK_IN input to CLK_OUT output will be nearly zero.

Product Features
• High-Performance, Phase-Locked-Loop Clock Distribution
• Allows Clock Input to have Spread Spectrum modulation for EMI reduction
• Zero Input-to-Output delay
• Low jitter: Cycle-to-Cycle jitter –100ps max.
• On-chip series damping resistor at clock output drivers for low noise and EMI reduction
• Operates at 3.3V VCC
• Wide range of Clock Frequencies up to 80 MHz
• Package: Plastic 8-pin SOIC (W)