1 General description
The 74ALVT162827 high-performance BiCMOS device combines low static and dynamic
power dissipation with high speed and high output drive. It is designed for VCC operation
at 2.5 V or 3.3 V with I/O compatibility to 5 V.
The 74ALVT162827 20-bit buffers provide high performance bus interface buffering
for wide data/address paths or buses carrying parity. They have NOR Output Enables
(nOE0 and nOE1) for maximum control flexibility.
The 74ALVT162827 is designed with 30 Ω series resistance in both HIGH and LOW
output stages. This design reduces the line noise in applications such as memory
address drivers, clock drivers and bus receivers/transmitters.
2 Features and benefits
• Multiple VCC and GND pins minimize switching noise
• 5 V I/O compatible
• Live insertion and extraction permitted
• 3-state output buffers
• Outputs include series resistance of 30 Ω making external termination resistors
unnecessary
• Power-up 3-state
• Output capability: +12 mA and -12 mA
• Latch-up protection:
– JESD 17 exceeds 500 mA
• ESD protection:
– MIL STD 883 Method 3015: exceeds 2000 V
– MM: exceeds 200 V
• Bus hold data inputs eliminate the need for external pull-up resistors to hold unused
inputs