FEATURES
· Internal 16-bit architecture, selectable external data bus width (16/8 bits)
· Software compatible with V20TM and V30TM (native mode) and V25 and V35 (includes additional instructions)
· Minimum instruction cycle: 160 ns/12.5 MHz (external 25 MHz)
125 ns/16 MHz (external 32 MHz)
· Address space: 16M bytes: 1-Mbyte basic memory space
16-Mbyte extended memory space
· Register file space (in on-chip RAM) : 512 bytes/16 register banks
· I/O space : 64K bytes
· Automatic wait control with memory space divided in variable sizes (max. 6 blocks)
· I/O line (input ports: 11 bits, input/output ports: 42 bits)
· DMA controller (DMAC): Max. 4-channel configuration possible
• Four DMA transfer modes (single transfer, demand release, single step, burst)
• Intelligent DMA modes 1 and 2
· Serial interface: 2 channels
• Asynchronous mode (UART) or clocked mode (CSI) selectable
· Parallel interface: 8 bits
• Centronics data input/output and general-purpose data input/output
· A/D converter (8 bits): 4 channels
· Real-time output port: 4 bits ´ 2 channels or 8 bits ´ 1 channel
· PMW (Pulse Width Modulation) output function : 8 bits