FEATURES
· Internal 16-bit architecture and external 8-bit data bus
· High-speed processing by pipeline control and instruction prefetch
• Minimum instruction execution time: 250 ns (with 16 MHz external clock in operation)
· Instruction set suitable for control operations (mPD78312 upward compatible)
• Multiply/divide instructions (16 bits ´ 16 bits, 32 bits ¸ 16 bits)
• Bit manipulation instruction
• String instruction, etc.
· On-chip high-function interrupt controller
• 3-level priority specifiable
• 3-type interrupt processing mode selectable
(Vectored interrupt function, context switching function, and macro service function)
· Variety of peripheral hardware
• Realtime pulse unit
• 8-channel, 10-bit A/D converter
• Watchdog timer