FEATURES
300 MHz internal clock rate
FSK, BPSK, PSK, chirp, AM operation
Dual integrated 12-bit digital-to-analog converters (DACs)
Ultrahigh speed comparator, 3 ps rms jitter
Excellent dynamic performance 80 dB SFDR at 100 MHz (±1 MHz) AOUT
4× to 20× programmable reference clock multiplier
Dual 48-bit programmable frequency registers
Dual 14-bit programmable phase offset registers
12-bit programmable amplitude modulation and on/off output shaped keying function
Single-pin FSK and BPSK data interfaces
PSK capability via input/output interface
Linear or nonlinear FM chirp functions with single-pin frequency hold function
Frequency-ramped FSK
<25 ps rms total jitter in clock generator mode
Automatic bidirectional frequency sweeping
Sin(x)/x correction
Simplified control interfaces
10 MHz serial 2- or 3-wire SPI compatible
100 MHz parallel 8-bit programming
3.3 V single supply
Multiple power-down functions
Single-ended or differential input reference clock
Small, 80-lead LQFP or TQFP with exposed pad
APPLICATIONS
Agile, quadrature LO frequency synthesis
Programmable clock generators
FM chirp source for radar and scanning systems
Test and measurement equipment
Commercial and amateur RF exciters