DESCRIPTION
The PM5357 S/UNI-622-POS SATURN User Network Interface is a monolithic integrated circuit that implements SONET/SDH processing, ATM mapping and Packet over SONET/SDH mapping functions at the STS-12c/STM-4-4c 622.08 Mbit/s rate.

FEATURES
General
• Single chip ATM and Packet over SONET/SDH Physical Layer Device operating at 622.08 Mbit/s.
• Implements the ATM Forum User Network Interface Specification and the ATM physical layer for Broadband ISDN according to CCITT Recommendation I.432.
• Implements the Point-to-Point Protocol (PPP) over SONET/SDH specification according to RFC 2615.
• Processes duplex bit-serial 622.08 Mbit/s STS-12c/STM-4-4c data streams with on-chip clock and data recovery and clock synthesis.
• Supports a duplex byte-serial 77.76 Mbyte/s STS-12c/STM-4-4c line side interface for use in applications where by-passing clock recovery, clock synthesis, and serializer-deserializer functionality is desired.
• Supports a byte-serial 19.44 Mbyte/s STS-3c/STM-1 line side interface on the transmit and/or receive interface for use in applications where a 155.52 Mbit/s data rate is desired.
• Supports clock recovery by-pass for use in applications where external clock recovery is desired.
• Complies with Bellcore GR-253-CORE (1995 Issues) jitter tolerance, jitter transfer and intrinsic jitter criteria.
• Provides control circuitry required to comply with Bellcore GR-253-CORE WAN clocking requirements related to wander transfer, holdover and long term stability when using an external VCXO.
• Provides UTOPIA Level 2 16-bit wide System Interface (clocked up to 50 MHz) with parity support for ATM applications.
• Provides UTOPIA Level 3 compatible 8-bit wide System Interface (clocked up to 100 MHz) with parity support for ATM applications.
• Provides SATURN POS-PHY Level 2 16-bit System Interface (clocked up to 50 MHz) for Packet over SONET/SDH (POS) applications. This system interface is similar to UTOPIA Level 2, but adapted to packet transfer.
• Provides SATURN POS-PHY Level 3 8-bit System Interface (clocked up to 100 MHz) for Packet over SONET/SDH (POS) applications.
• Provides support functions for a two chip solution for 1+1 APS operation.
• Provides a standard 5 signal IEEE 1149.1 JTAG test port for boundary scan board test purposes.
• Provides a generic 8-bit microprocessor bus interface for configuration, control, and status monitoring.
• Low power 3.3V CMOS with TTL compatible digital inputs and CMOS/TTL digital outputs. PECL inputs and outputs are 3.3V and 5V compatible.
• Industrial temperature range (-40°C to +85°C).
• 304 pin Super BGA package.

APPLICATIONS
• WAN and Edge ATM switches.
• LAN switches and hubs.
• Packet switches and hubs.
• Routers and Layer 3 Switches
• Network Interface Cards and Uplinks