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PM8611 数据表 (PDF) - PMC-Sierra, Inc

PM8611 Datasheet PDF - PMC-Sierra, Inc
部件名 PM8611
下载  PM8611 下载
文件大小   1585.4 Kbytes
  292 Pages
制造商  PMC [PMC-Sierra, Inc]
网页  http://www.pmc-sierra.com
标志 PMC - PMC-Sierra, Inc
功能描述 SBSLITE??Telecom Standard Product Data Sheet Preliminary

PM8611 Datasheet (PDF)

Go To PDF Page 下载 数据表
PM8611 Datasheet PDF - PMC-Sierra, Inc

部件名 PM8611
下载  PM8611 Click to download

文件大小   1585.4 Kbytes
  292 Pages
制造商  PMC [PMC-Sierra, Inc]
网页  http://www.pmc-sierra.com
标志 PMC - PMC-Sierra, Inc
功能描述 SBSLITE??Telecom Standard Product Data Sheet Preliminary

PM8611 数据表 (HTML) - PMC-Sierra, Inc


PM8611 产品详情

Features

• The PM8611 SBI336 Bus Serializer (SBSLITE™) is a:

   ° Scalable Bandwidth Interconnect (SBI™) converter and Time Division Multiplexer (TDM) SBI switch.

   ° Byte-wide 77.76 MHz SBI336 bus to 777.6 MHz serial SBI336S converter.

   ° DS0, NxDS0, T1, E1, TVT1.5, TVT2, DS3 and E3 granular SBI336 to serial SBI336S switch. Supports subrate link switching with the restriction that subrate links must be symmetric in both the transmit and receive directions.

   ° Byte-wide 77.76 MHz TelecomBus to serial 777.6 MHz TelecomBus converter. This requires the TelecomBus J1 byte to be in a fixed location corresponding to a value of 0 or 522 which is immediately following the C1 octets:

   ° VT1.5, VT2, STS-1 77.76 MHz TelecomBus to serial TelecomBus switch.

• Can be used with the Narrowband Switch Elements, NSE-20G, to implement a DS0 granularity SBI Memory:Space:Memory switch scalable to 20 Gbit/s and NSE-8G, to implement a switch scalable to 8 Gbit/s. In TelecomBus mode, a 20 Gbit/s VT1.5/VT2 granularity Memory:Space:Memory switch can be implemented.

• Integrates two independent DS0 granularity Memory Switches. One switch is placed between the incoming 77.76 MHz byte-wide SBI336 bus and the transmit working and protect Serial SBI336S link. The transmit working and protect links transmit the same data. The other switch is placed between the receive working or protect Serial SBI336S link and the outgoing 77.76 MHz byte-wide SBI336 bus.

• Provides 125 µS nominal latency in DS0 mode. Channel Associated Signaling (CAS) latency through the SBSLITE in DS0 mode is two T1 multiframe (6 mS) or two E1 multiframe (4 mS).

• Provides less than 16 µS nominal latency in TelecomBus mode or SBI mode without DS0 level switching.

• Permits any receive or incoming byte from an input port to be mapped to any outgoing or transmit byte, respectively, on the associated output port through the Memory switch.

• Supports redundant working and protect serial SBI336S links in support of a redundant Memory:Space:Memory switch with the NSE.

• Encodes and decodes byte-wide SBI336 bus control signals for all SBI supported link types and clock modes for transport over the serial SBI336S interface.

• Encodes data from the Incoming SBI336 bus or TelecomBus stream to a working and protect 777.6 Mbit/s LVDS serial links with 8B/10B-based encoding.

• Decodes data from a working and protect 777.6 MHz low voltage differential serializer (LVDS) serial links with 8B/10B-based encoding to the Outgoing SBI336 bus or TelecomBus stream.

• In SBI mode, switches CAS bits with all DS0 data.

• Uses 8B/10B-based line coding protocol on the serial links to provide transition density guarantee and DC balance and to offer a greater control character vocabulary than the standard 8B/10B protocol.

• Provides optional pseudo-random bit sequence (PRBS) generation for each outgoing LVDS serial data link for off-line link verification. PRBS can be inserted with STS-1 granularity.

• Provides PRBS detection for each incoming LVDS serial link for off-line link verification. PRBS is verified with STS-1 granularity.

• Provides pins to coordinate updating of the connection map of the memory switch blocks in the local device, peer SBSLITE devices and companion NSE switch device.

• Can communicate with the NSE switch device over an in-band communications channel in the LVDS links. This channel includes mechanisms for central control and configuration.

• Derives all internal timing from a single 77.76 MHz system clock to a system frame pulse.

• Implemented in 1.8 V/3.3 V 0.18 µm CMOS and packaged in a 160 ball 15 mm x 15 mm PBGA.

• Consumes low power at 1.4 W.



Applications

• T1/E1 SONET/SDH Cross-connects

• T1/E1 SONET/SDH Add-Drop Multiplexers

• OC-48 Multiservice Access Multiplexers

• Channelized OC-12/OC-48 Any Service Any Port Switches

• Serial Backplane Board Interconnect

• Shelf to Shelf Cabled Serial Interconnect

• Voice Gateways



 




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