Features:
® Three-stats outputs
® input disabled without gating the clock
® Gated output control lines for
enabling or disabling the outputs
® Standardized, symmetrical output
characteristics
® 100% tested for quiescent current at 20 V
® Maximum input current of 1 yA at 18 V over
full package temperature range; 100 nA at
18 V and 25°C
® Noise margin over full package temperature
range:
1VatVpp=5V
2VatVpp=10V
25VatVpp=15V
® 5-V, 10-V, and 15-V parametric ratings
® Meets all requirements of JEDEC Tentative
Standard No. 13B, “Standard Specifications
for Description of ‘B’ Series CMOS Devices”