Function and Pinout Compatible With FCT,
F, and AM29827 Logic
25-Ω Output Series Resistors Reduce
Transmission-Line Reflection Noise
Reduced VOH (Typically = 3.3 V) Versions
of Equivalent FCT Functions
Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
Ioff Supports Partial-Power-Down Mode
Operation
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
Matched Rise and Fall Times
Fully Compatible With TTL Input and
Output Logic Levels
12-mA Output Sink Current
15-mA Output Source Current
3-State Outputs

description
The CY74FCT2827T 10-bit buffer provides high-performance bus-interface buffering for wide data/address
paths or buses carrying parity. This 10-bit buffer has NANDed output-enable (OE) inputs for maximum control
flexibility. The CY74FCT2827T is designed for high-capacitance-load drive capability, while providing
low-capacitance bus loading at both inputs and outputs. All inputs have clamp diodes and all outputs are
designed for low-capacitance bus loading in the high-impedance state. On-chip termination resistors at the
outputs reduce system noise caused by reflections. The CY74FCT2827T can replace the CY74FCT827T to
reduce noise in an existing design.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.