Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
Extended Temperature Performance of
−40°C to 110°C
Enhanced Diminishing Manufacturing
Sources (DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree†
Fully Supports Provisions of IEEE
1394b-2002 at S100, S100B, S200, S200B,
S400, and S400B Signaling Rates
(B Signifies 1394b Signaling)
Fully Supports Provisions of IEEE
1394a-2000 and 1394-1995 Standards for
High-Performance Serial Bus
Fully Interoperable With Firewire™,
DTVLink, SB1394, DishWire, and i.LINK™
Implementation of IEEE Std 1394
Provides Three Fully Backward
Compatible, (1394a-2000 Fully Compliant)
Bilingual 1394b Cable Ports at
400 Megabits per Second (Mbps)
Same Three Fully Backward Compatible
Ports Are 1394a-2000 Fully Compliant
Cable Ports at 100/200/400 Mbps
Full 1394a-2000 Support Includes:
− Connection Debounce
− Arbitrated Short Reset
− Multispeed Concatenation
− Arbitration Acceleration
− Fly-By Concatenation
− Port Disable/Suspend/Resume
− Extended Resume Signaling for
Compatibility With Legacy DV Devices
Power-Down Features to Conserve Energy
in Battery Powered Applications
Low-Power Automotive Sleep Mode
Support
Fully Compliant With Open Host Controller
Interface (OHCI) Requirements
Cable Power Presence Monitoring
Cable Ports Monitor Line Conditions for
Active Connection to Remote Node
Register Bits Give Software Control of
Contender Bit, Power Class Bits, Link
Active Control Bit, and 1394a-2000
Features
Data Interface to Link-Layer Controller
Pin-Selectable From 1394a-2000 Mode
(2/4/8 Parallel Bits at 49.152 MHz) or 1394b
Mode (8 Parallel Bits at 98.304 MHz)
Interface to Link-Layer Controller Supports
Low-Cost Texas Instruments Bus-Holder
Isolation
Interoperable With Link-Layer Controllers
Using 3.3-V Supplies
Interoperable With Other 1394 Physical
Layers (PHYs) Using 1.8-V, 3.3-V, and 5-V
Supplies
Low-Cost 49.152-MHz Crystal Provides
Transmit and Receive Data at
100/200/400 Mbps and Link-Layer
Controller Clock at 49.152 MHz and
98.304 MHz
Separate Bias (TPBIAS) for Each Port
Low-Cost, High-Performance, 80-Pin TQFP
(PFP) Thermally Enhanced Package
Software Device Reset (SWR)
Fail-Safe Circuitry Senses Sudden Loss of
Power to the Device and Disables the Ports
to Ensure That the TSB41BA3A-EP Does
Not Load the TPBIAS of Any Connected
Device and Blocks Any Leakage From the
Port Back to Power Plane
1394a-2000-Compliant Common-Mode
Noise Filter on the Incoming Bias Detect
Circuit to Filter Out Cross-Talk Noise
Cable/Transceiver Hardware Speed and
Port Mode Are Selectable by Pin States