Features:
Pin 7 NOR input positioned adjacent
to Vss for easy use of gate as an inverter
Pin 15 NAND input positioned adjacent
to Voo for easy use of gate as an inverter
Standard symmetrical output characteristics
100% tested for quiescent current at 20 V
Maximum input current of 1 yA at 18 V
over full package-temperature range:
100 nA at 18 V and 25°C
5-V, 10-V, and 15-V parametric ratings
Meets all requirements of JEDEC
Standard No. 138, “Standard Specifi-
cations for Description of ‘B’ Series
CMOS Devices”