1 Features
• Extra low latency TX < 90ns, RX < 290ns
• Time Sensitive Network (TSN) compliant
• Low power consumption: 457mW
• Exceeds 8000V IEC 61000-4-2 ESD protection
• Meets EN55011 class B emission standards
• 16 programmable RGMII delay modes on RX/TX
• Integrated MDI termination resistors
• Programmable MAC interface termination
impedance
• WoL (Wake-on-LAN) packet detection
• 25MHz or 125MHz synchronized clock output
• Start of Frame Detect for IEEE 1588 time stamp
• RJ45 mirror mode
• Fully compatible to IEEE 802.3 10BASE-Te,
100BASE-TX, and 1000BASE-T Specification
• Cable diagnostics
• RGMII and SGMII MAC interface options
• Configurable I/O voltage (3.3V, 2.5V, 1.8V)
• Fast link drop mode
• JTAG support

2 Applications
• Motor drives
• Industrial factory automation
• Field Bus Support
• Industrial embedded computing
• Wired and wireless communications infrastructure
• Test and measurement
• Consumer electronics

3 Description
The DP83867 device is a robust, low power, fully
featured Physical Layer transceiver with integrated
PMD sublayers to support 10BASE-Te, 100BASETX
and 1000BASE-T Ethernet protocols. Optimized
for ESD protection, the DP83867 exceeds 8kV IEC
61000-4-2 (direct contact).
The DP83867 is designed for easy implementation
of 10/100/1000Mbps Ethernet LANs. DP83867
interfaces directly to twisted pair media through an
external transformer. This device interfaces directly
to the MAC layer through Reduced GMII (RGMII) or
embedded clock Serial GMII (SGMII).
The DP83867 provides precision clock
synchronization, including a synchronous Ethernet
clock output. DP83867 has low latency and provides
IEEE 1588 Start of Frame Detection.
Designed for low power, the DP83867 consumes only
457mW under full operating power. Wake-on-LAN can
be used to lower system power consumption.