1 Features
• Available in the ultra-small 0.64mm2 package
(DPW) with 0.5mm pitch
• Supports 5V VCC operation
• Inputs accept voltages up to 5.5V allowing down
translation to VCC
• Maximum tpd of 3.3ns at 3.3V
• Low power consumption, 10μA maximum ICC
• ±24mA output drive at 3.3V
• Ioff supports live-insertion, partial-power-down
mode, and back-drive protection
• Latch-up performance exceeds 100mA per JESD
78, Class II
• ESD protection exceeds JESD 22
– 2000V human-body model (A114-A)
– 200V machine model (A115-A)
– 1000V charged-device model (C101)

2 Applications
• AV receiver
• Audio dock: portable
• Blu-ray player and home theater
• Embedded PC
• MP3 player/recorder (portable audio)
• Personal Digital Assistant (PDA)
• Power: telecom/server AC/DC supply: single
controller: analog and digital
• Solid State Drive (SSD): client and enterprise
• TV: LCD/digital and high-definition (HDTV)
• Tablet: enterprise
• Video analytics: server
• Wireless headset, keyboard, and mouse

3 Description
This single inverter gate is designed for 1.65V to 5.5V
VCC operation.
The SN74LVC1G04 device performs the Boolean
function Y = A.
The CMOS device has high output drive while
maintaining low static power dissipation over a broad
VCC operating range.
The SN74LVC1G04 device is available in a variety
of packages, including the ultra-small DPW package
with a body size of 0.8mm × 0.8mm.