▪ Flexible 1.8V, 2.5V, 3.3V power-rails
▪ High-performance, low phase noise PLL, < 0.5ps RMS typical
phase jitter on outputs
▪ Four banks of internal OTP memory
• In-system or factory programmable
• 2 select pins accessible with processor GPIOs or bootstrapping
▪ I2C serial programming interface
• 0xD0 or 0xD4 I2C address options allows multiple devices
configured in a same system
▪ Reference LVCMOS output clock
▪ Four universal output pairs individually configurable:
• Differential (LVPECL, LVDS or HCSL)
• 2 single-ended (2 LVCMOS in-phase or 180 degrees out of phase)
• I/O VDDs can be mixed and matched, supporting 1.8V
(LVDS and LVCMOS), 2.5V, or 3.3V
▪ Output frequency ranges:
• LVCMOS clock outputs: 1kHz to 200MHz
• LVDS, LVPECL, HCSL differential clock outputs: 1kHz to 350MHz
▪ Redundant clock inputs with manual switchover
▪ Programmable output enable or power-down mode
▪ Available in 4 × 4 mm 24-VFQFPN package
▪ -40° to +85°C industrial temperature operation