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200-MHz, 32-bit RX MCU, on-chip FPU, 1160 CoreMark, Supportive of 5V power supply,
up to 1-MB flash memory, 128-KB SRAM, 32-KB data flash memory, 16-KB SRAM with ECC, Simultaneous sampling with 3 units of 12-bit A/D converter (up to 7 channels), Single-end/pseudo differential input supportive amplifier (6 channels), Analog comparator (6 channels), 200 MHz PWM (4 channels for 3-phase complementary, 2 channels for 5-phase
complementary, 10 channels for single-phase complementary), 4-channel high-resolution PWM with resolution of 195 ps at the minimum, Host/function or OTG controller with full-speed USB 2.0 transfer, CAN, Encryption functions (optional)
■ 32-bit RXv3 CPU core
Maximum operating frequency: 200 MHz
Capable of 1160 CoreMark in operation at 200 MHz
JTAG and FINE (one-line) debugging interfaces
A function for collectively saving the values of registers is available.
■ Low-power design and architecture
Operation from a single 2.7- to 5.5-V supply
Four low-power modes
■ On-chip code flash memory
Supports versions with 1 Mbytes/512 Kbytes
No wait cycles at up to 120 MHz or when the ROM cache is hit
User code is programmable by on-board or off-board programming.
■ On-chip data flash memory
32 Kbytes, reprogrammable up to 100,000 times
Programming/erasing as background operations (BGOs)
■ On-chip SRAM, no wait states
128Kbytes of SRAM (no wait states)
16 Kbytes of RAM with ECC (with wait)
■ Data transfer
DMACa: 8 channels
DTCa: 1 channel
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