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BATT-TPLCABLE50 数据表 (PDF) - NXP Semiconductors

BATT-TPLCABLE50 Datasheet PDF - NXP Semiconductors
部件名 BATT-TPLCABLE50
下载  BATT-TPLCABLE50 下载
文件大小   4276.08 Kbytes
页   16 Pages
制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors
功能描述 Hardware user manual

BATT-TPLCABLE50 Datasheet (PDF)

Go To PDF Page 下载 数据表
BATT-TPLCABLE50 Datasheet PDF - NXP Semiconductors

部件名 BATT-TPLCABLE50
下载  BATT-TPLCABLE50 Click to download

文件大小   4276.08 Kbytes
页   16 Pages
制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors
功能描述 Hardware user manual

BATT-TPLCABLE50 数据表 (HTML) - NXP Semiconductors


BATT-TPLCABLE50 产品详情

Board features
The main features of FRDM665SPIEVB are:
• Request SPI
• Response SPI
• Onboard transformer isolation for TPL communication to BCC devices
• Configurable VIO voltage
• Configurable VDD5V from internal and external supply
• DIP switch for configuring the SPI of MC33665A to operate with or without crystals
• Reset switch for MC33665A
• LED display for the status of power
• Connectors to interface directly with S32K344EVB launchpad
• Connectors for external interface to general-purpose input/output (GPIO) and I2C-bus
Board description
The FRDM665SPIEVB allows the user to prototype and test all functions of the
MC33665A gateway router.
It can be stacked directly on the S32K344EVB. Different modes of SPI communication
can be established with MC33665A from K1 to K6 connectors. The FRDM665SPIEVB
can be supplied with 12 V at J6 connector or it can be powered directly from
S32K344EVB or EXT5V at J11. VDDC and VDDD can be selected by bridging one of the
positons in jumper J8 (Table 7) to select the 5 V. Bridging options jumper at J13 (Table 8)
makes it possible to select the VIO voltage of 3.3 V or 5 V or VIO of S32K344EVB.
S32K344EVB can be supplied with USB connection when connected to a PC.
SPI interface to external controller boards can be done with J7 for REQ SPI and J16 for
RSP SPI. Ensure the VIO of external controller board is the same as the VIO selected
with jumper J13. Single SPI or dual SPI modes can be selected by using jumpers at J14.
Populating all jumpers at J14 enables single SPI mode and depopulates jumpers at J14
for dual SPI mode. SW2 DIP switch can be used to select the CFG and ID configuration
for MC33665A. BCC devices can be connected to daisy chain ports 0 to 3 via connectors
J5, J12, J17, and J18.
Connector J1 gives the option to access the GPIO and I2C-bus pins of MC33665A.
Contact the NXP engineering team for using TPL_AUTOWAKE function in
FRDM665SPIEVB.




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关于 NXP Semiconductors


NXP半导体是一家公开交易的跨国公司,设计,开发和制造各种半导体和集成电路,用于各种应用,包括汽车,工业,通信和消费市场。

该公司成立于2006年,总部位于荷兰的埃因霍温。

NXP提供了广泛的产品组合,包括微控制器,微处理器,安全身份验证IC,电源管理ICS,RF和微波炉组件以及传感器解决方案等。

该公司的产品旨在具有节能,安全和可靠,并用于各种应用中,包括汽车系统,工业自动化和控制,智能家居和建筑物以及连接的设备。

NXP致力于创新和客户满意度,并致力于为客户提供最佳的半导体解决方案,以满足他们的需求。

*此信息仅供一般参考,对于因上述信息造成的任何损失或损害,我们概不负责。




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