OVERVIEW
The ST7 real-time development tools consist of various hardware and software components, which together form a flexible and sophisticated system designed to provide comprehensive devel opment support for the ST7 family of MCUs.
The Hardware Development System (HDS) main frame is common to all ST7 devices and, in conjunction with various Dedication Board Emulators (DBE), allows emulation and development of specific devices. Only the DBE and probe need to be changed to emulate a new ST7 family device.
The development system is controlled by a Host PC on which a choice of Windows-based software may be run. The Host PC is simply connected to the Emulator Mainframe by means of an RS-232 serial link or a parallel port. The STVD7 Windows GNU Debugger software suite is supplied as standard issue with the Emulator hardware, in addition to the conventional DOS ST7 Software suite, which includes a macroassembler, a linker/loader. Third party C Toolchain and Debugger software is also available. The Windows-based debugger provides a user friendly and highly flexible interface which may be configured to precisely match the user’s requirements. All emulator settings are accessible via the control software.
Once assembled, and/or compiled and linked, the application software may be downloaded to the real-time emulation memory, which can be configured, mapped and modified as required by the user. The device probe is then connected to the application target hardware in place of the MCU and real-time emulation of the target application can begin, thus allowing sophisticated testing and debugging of both application hardware and software.

FEATURES
■ A common Hardware Development System mainframe supports the entire ST7 family of MCUs, in conjunction with the appropriate ST7xxx-DBE Dedicated Board Emulator.
■ Real-time source level emulation allows viewing and breakpoint setting on high level source code rather than on disassembled target code for optimum user friendliness.
■ 64 KBytes of user modifiable and configurable emulation RAM, allows memory mapping of all ST7 family devices as well as modelling hypothetical memory configurations.
■ Unlimited breakpoints may be set for any op code fetch or any address access, and conditions may be defined for the generation of 2 external synchronization signals.
■ 1K by 32-bit wide trace memory for Logic Analyzer allows complex and sequential events to be defined on any combination of address and data, as well as 3 internal and 5 external logic signals.
■ Logic Analyzer events may trigger a breakpoint or simply define data capture parameters, in accordance with user preferences.
■ Simple connection of the emulator system to the Host PC via RS-232 serial channel or via parallel port1)
■ Emulation system may be driven by a Windows based GNU debugger software or DOS software running on host PC, allowing full control and monitoring of hardware resources.
■ Multiple windows allow concurrent real-time display of source code, MCU resources, internal registers, trace data, etc.
■ Log files allow storage and subsequent redisplay of any displayed screen for subsequent analysis.
■ Command files can be used to execute a set of debugger commands in batch mode.
■ Editable configuration files ensure tailoring of working environment to user preferences.
   Note 1. On the ST7-EMU2 version of the Emulator.