GENERAL DESCRIPTION
The AD6659 is a mixed-signal, dual-channel IF receiver supporting radio topologies requiring two receiver signal paths, such as in main/diversity or direct conversion. This communications systems processor consists of two high performance analog-todigital converters (ADCs) and noise shaping requantizer (NSR) digital blocks. It is designed to support various communications applications where high dynamic range performance and small size are desired.

FEATURES
   12-bit, 80 MSPS output data rate per channel
   1.8 V analog supply operation (AVDD)
   1.8 V to 3.3 V output supply (DRVDD)
   Integrated noise shaping requantizer (NSR)
   Integrated quadrature error correction (QEC)
   Performance with NSR enabled
      SNR = 81 dBFS in 16 MHz band up to 30 MHz at 80 MSPS
   Performance with NSR disabled
      SNR = 72 dBFS up to 70 MHz at 80 MSPS
      SFDR = 90 dBc up to 70 MHz input at 80 MSPS
   Low power: 98 mW per channel at 80 MSPS
   Differential input with 700 MHz bandwidth
   On-chip voltage reference and sample-and-hold circuit
   2 V p-p differential analog input
   Serial port control options
      Offset binary, gray code, or twos complement data format
      Optional clock duty cycle stabilizer
      Integer 1-to-6 input clock divider
      Data output multiplex option
      Built-in selectable digital test pattern generation
      Energy-saving power-down modes
      Data clock out with programmable clock and data alignment

APPLICATIONS
   Communications
   Diversity radio systems
   Multimode digital receivers
      3G, W-CDMA, LTE, CDMA2000, TD-SCDMA, MC-GSM
   I/Q demodulation systems
   Smart antenna systems
   Battery-powered instruments
   General-purpose software radios