GENERAL DESCRIPTION
The ADF4110 family of frequency synthesizers can be used to implement local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. They consist of a low noise digital PFD (phase frequency detector), a precision charge pump, a programmable reference divider, programmable A and B counters, and a dual-modulus prescaler (P/P + 1). The A (6-bit) and B (13-bit) counters, in conjunction with the dual-modulus prescaler (P/P + 1), implement an N divider (N = BP + A). In addition, the 14-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO).

FEATURES
   ADF4110: 550 MHz; ADF4111: 1.2 GHz; ADF4112: 3.0 GHz;
      ADF4113: 4.0 GHz
   2.7 V to 5.5 V power supply
   Separate charge pump supply (VP) allows extended tuning
      voltage in 3 V systems
   Programmable dual-modulus prescaler 8/9, 16/17, 32/33,
      64/65
   Programmable charge pump currents
   Programmable antibacklash pulse width
   3-wire serial interface
   Analog and digital lock detect
   Hardware and software power-down mode

APPLICATIONS
   Base stations for wireless radio (GSM, PCS, DCS, CDMA,
      WCDMA)
   Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA)
   Wireless LANS
   Communications test equipment
   CATV equipment