Description
The LCK4953 is a PLL-based clock driver device intended for high-performance clock tree designs. The LCK4953 is 3.3 V compatible with output frequencies of up to 130 MHz and output skews of 75 ps. The LCK4953 can meet the most demanding timing requirements and employs on-chip voltage regulators to minimize cycle-to-cycle jitter and phase jitter.

Features
• Fully integrated PLL
• Output frequency up to 130 MHz in PLL mode
• Nine outputs with high-impedance disable
• 32-lead TQFP
• 50 ps cycle-to-cycle jitter
• Pin compatible with the Motorola® MPC953 clock driver