Description
The STM32F373xx family is based on the high-performance ARM® Cortex®-M4 32-bit RISC core operating at a frequency of up to 72 MHz, and embedding a floating point unit (FPU), a memory protection unit (MPU) and an Embedded Trace Macrocell™ (ETM). The family incorporates high-speed embedded memories (up to 256 Kbyte of Flash memory, up to 32 Kbytes of SRAM), and an extensive range of enhanced I/Os and peripherals connected to two APB buses.

Features
• Core: ARM® 32-bit Cortex®-M4 CPU (72 MHz max), single-cycle multiplication and HW division, DSP instruction with FPU (floatingpoint unit) and MPU (memory protection unit)
• 1.25 DMIPS/MHz (Dhrystone 2.1)
• Memories
    – 64 to 256 Kbytes of Flash memory
    – 32 Kbytes of SRAM with HW parity check
• CRC calculation unit
• Reset and power management
    – Voltage range: 2.0 to 3.6 V
    – Power-on/Power down reset (POR/PDR)
    – Programmable voltage detector (PVD)
    – Low power modes: Sleep, Stop, Standby
    – VBAT supply for RTC and backup registers
• Clock management
    – 4 to 32 MHz crystal oscillator
    – 32 kHz oscillator for RTC with calibration
    – Internal 8 MHz RC with x16 PLL option
    – Internal 40 kHz oscillator
• Up to 84 fast I/Os
    – All mappable on external interrupt vectors
    – Up to 45 I/Os with 5 V tolerant capability
• 12-channel DMA controller
• One 12-bit, 1.0 µs ADC (up to 16 channels)
    – Conversion range: 0 to 3.6 V
    – Separate analog supply from 2.4 up to 3.6
• Three 16-bit Sigma Delta ADC
    – Separate analog supply from 2.2 to 3.6 V, up to 21 single/ 11 diff channels
• Three 12-bit DAC channels
• Two fast rail-to-rail analog comparators with programmable input and output
• Up to 24 capacitive sensing channels
• 17 timers
    – Two 32-bit timers and three 16-bit timers with up to 4 IC/OC/PWM or pulse counters
    – Two 16-bit timers with up to 2 IC/OC/PWM or pulse counters
    – Four 16-bit timers with up to 1 IC/OC/PWM or pulse counter
    – Independent and system watchdog timers
    – SysTick timer: 24-bit down counter
    – Three 16-bit basic timers to drive the DAC
• Calendar RTC with Alarm and periodic wakeup from Stop/Standby
• Communication interfaces
    – CAN interface (2.0B Active)
    – Two I2Cs supporting Fast Mode Plus (1 Mbit/s) with 20 mA current sink, SMBus/PMBus, wakeup from STOP
    – Three USARTs supporting synchronous mode, modem control, ISO/IEC 7816, LIN, IrDA, auto baud rate, wakeup feature
    – Three SPIs (18 Mbit/s) with 4 to 16 programmable bit frames, muxed I2S
    – HDMI-CEC bus interface
    – USB 2.0 full speed interface
• Serial wire devices, JTAG, Cortex®-M4 ETM
• 96-bit unique ID