Description
The CDP1802 family of CMOS microprocessors are 8-bit register oriented central processing units (CPUs) designed for use as general purpose computing or control elements in a wide range of stored program systems or products.
The CDP1802 types include all of the circuits required for fetching, interpreting, and executing instructions which have been stored in standard types of memories. Extensive input/output (I/O) control features are also provided to facilitate system design.
The 1800 series architecture is designed with emphasis on the total microcomputer system as an integral entity so that systems having maximum flexibility and minimum cost can be realized. The 1800 series CPU also provides a synchronous interface to memories and external controllers for I/O devices, and minimizes the cost of interface controllers. Further, the I/O interface is capable of supporting devices operating in polled, interrupt driven, or direct memory access modes.

Features
• Maximum Input Clock Maximum Frequency Options
   At VDD = 5V
   - CDP1802A, AC . . . . . . . . . . . . . . . . . . . . . . . . . 3.2MHz
   - CDP1802BC . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.0MHz
• Maximum Input Clock Maximum Frequency Options
   At VDD = 10V
   - CDP1802A, AC . . . . . . . . . . . . . . . . . . . . . . . . . 6.4MHz
• Minimum Instruction Fetch-Execute Times
   At VDD = 5V
   - CDP1802A, AC . . . . . . . . . . . . . . . . . . . . . . . . . . 5.0µs
   - CDP1802BC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2µs
• Any Combination of Standard RAM and ROM Up to
   65,536 Bytes
• 8-Bit Parallel Organization With Bidirectional Data Bus
   and Multiplexed Address Bus
• 16 x 16 Matrix of Registers for Use as Multiple
   Program Counters, Data Pointers, or Data Registers
• On-Chip DMA, Interrupt, and Flag Inputs
• Programmable Single-Bit Output Port
• 91 Easy-to-Use Instructions