GENERAL DESCRIPTION
The ADP5051 combines four high performance buck regulators and a supervisory circuit with a voltage monitor, a watchdog function, and a manual reset in a 48-lead LFCSP package that meets demanding performance and board space requirements. The device enables direct connection to high input voltages up to 15.0 V with no preregulators.
Channel 1 and Channel 2 integrate high-side power MOSFET and low-side MOSFET drivers. In low-side power devices, use external NFETs to achieve an efficiency optimized solution and deliver a programmable output current of 1.2 A, 2.5 A, or 4 A.
Combining Channel 1 and Channel 2 in a parallel configuration provides a single output with up to 8 A of current. Channel 3 and Channel 4 integrate both high-side and low-side MOSFETs to deliver an output current of 1.2 A.
The ADP5051 supervisory circuits monitor the voltage level. The watchdog timer generates a reset when the WDI pin does not toggle within a preset timeout period. Select manual reset functionality via the processor reset mode or system power on/off switch mode.
The optional I2C interface offers flexible configurations, including adjustable and fixed output voltage, junction temperature overheat warning, low input voltage detection, and dynamic voltage scaling.

FEATURES
   Wide input voltage range: 4.5 V to 15.0 V
   ±1.5% output accuracy over full temperature range
   250 kHz to 1.4 MHz adjustable switching frequency
   Adjustable/fixed output options via factory fuse or I2C interface
   I2C interface with interrupt on fault conditions
   Power regulation
      Channel 1 and Channel 2: programmable 1.2 A/2.5 A/4 A
         sync buck regulators with low-side FET driver
      Channel 3 and Channel 4: 1.2 A sync buck regulators
   Single 8 A output (Channel 1 and Channel 2 in parallel)
   Dynamic voltage scaling (DVS) for Channel 1 and Channel 4
   Precision enable with 0.8 V accurate threshold
   Active output discharge switch
   Programmable phase shift in 90° steps
   Individual channel FPWM/PSM selection
   Frequency synchronization input or output
   Optional latch-off protection on OVP/OCP failure
   Power-good flag on selected channels
   Low input voltage detection
   Open-drain processor reset with external adjustable threshold
      monitoring
   Watchdog refresh input
   Manual reset input
   Overheat detection on junction temperature
   UVLO, OCP, and TSD protection

APPLICATIONS
   Small cell base stations
   FPGA and processor applications
   Security and surveillance
   Medical applications