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Features ■ Ultra-low-power platform – 1.65 V to 3.6 V power supply – -40 °C to 105 °C temperature range – 290 nA Standby mode (3 wakeup pins) – 1.11 µA Standby mode + RTC – 560 nA Stop mode (16 wakeup lines) – 1.4 µA Stop mode + RTC – 11 µA Low-power run mode down to 4.6 µA in Low-power sleep mode – 195 µA/MHz Run mode – 10 nA ultra-low I/O leakage – 8 µs wakeup time ■ Core: ARM® Cortex®-M3 32-bit CPU – From 32 kHz up to 32 MHz max – 1.25 DMIPS/MHz (Dhrystone 2.1) – Memory protection unit ■ Up to 34 capacitive sensing channels ■ CRC calculation unit, 96-bit unique ID ■ Reset and supply management – Low-power, ultrasafe BOR (brownout reset) with 5 selectable thresholds – Ultra-low-power POR/PDR – Programmable voltage detector (PVD) ■ Clock sources – 1 to 24 MHz crystal oscillator – 32 kHz oscillator for RTC with calibration – Internal 16 MHz oscillator factory trimmed RC(+/-1%) with PLL option – Internal low-power 37 kHz oscillator – Internal multispeed low-power 65 kHz to 4.2 MHz oscillator – PLL for CPU clock and USB (48 MHz) ■ Pre-programmed bootloader – USB and USART supported ■ Up to 116 fast I/Os (102 I/Os 5V tolerant), all mappable on 16 external interrupt vectors ■ Memories – 512 KB Flash memory with ECC (with 2 banks of 256 KB enabling RWW capability) – 80 KB RAM – 16 KB of true EEPROM with ECC – 128 Byte backup register ■ LCD driver (except STM32L151xE devices) up to 8x40 segments, contrast adjustment, blinking mode, step-up converter ■ Rich analog peripherals (down to 1.8 V) – 2x operational amplifiers – 12-bit ADC 1 Msps up to 40 channels – 12-bit DAC 2 ch with output buffers – 2x ultra-low-power comparators (window mode and wake up capability) ■ DMA controller 12x channels ■ 11x peripheral communication interfaces – 1x USB 2.0 (internal 48 MHz PLL) – 5x USARTs – Up to 8x SPIs (2x I2S, 3x 16 Mbit/s) – 2x I2Cs (SMBus/PMBus) ■ 11x timers: 1x 32-bit, 6x 16-bit with up to 4 IC/OC/PWM channels, 2x 16-bit basic timers, 2x watchdog timers (independent and window) ■ Development support: serial wire debug, JTAG and trace
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