AT89LP4052_14 pdf, AT89LP4052_14 功能描述, AT89LP4052_14 数据表, AT89LP4052

部件名	AT89LP4052

功能描述	Single Clock Cycle per Byte Fetch

文件大小	1855.47 Kbytes

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制造商	ATMEL [ATMEL Corporation]

网页	http://www.atmel.com

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类似零件编号 - AT89LP4052_14

制造商	部件名	数据表	功能描述
ATMEL Corporation	AT89LP4052-20PI	1Mb / 90P	8-bit Microcontroller with 2/4-Kbyte Flash
	AT89LP4052-20PU	1Mb / 90P	8-bit Microcontroller with 2/4-Kbyte Flash
	AT89LP4052-20PU	1Mb / 93P	8-bit Microcontroller with 2/4-Kbyte Flash
	AT89LP4052-20PU	1Mb / 94P	8-bit Microcontroller with 2/4-Kbyte Flash
	AT89LP4052-20SI	1Mb / 90P	8-bit Microcontroller with 2/4-Kbyte Flash

制造商	部件名	数据表	功能描述
Winbond	W631GG6KB-15	3Mb / 158P	Double Data Rate architecture: two data transfers per clock cycle
	W9412G2IB4	832Kb / 50P	Double Data Rate architecture; two data transfers per clock cycle
	W9751G6KB-25	1Mb / 87P	Double Data Rate architecture: two data transfers per clock cycle
ATMEL Corporation	AT28C17	201Kb / 12P	Self-Timed Byte Write Cycle
Elite Semiconductor Mem...	M13L32321A-2G	1Mb / 48P	Double-data-rate architecture, two data transfers per clock cycle
	M13L2561616A-2A	1Mb / 49P	Double-data-rate architecture, two data transfers per clock cycle
	M13S128324A-2M	1Mb / 48P	Double-data-rate architecture, two data transfers per clock cycle
	M13S2561616A-2A	1Mb / 49P	Double-data-rate architecture, two data transfers per clock cycle
	M13S2561616A-2S	1Mb / 49P	Double-data-rate architecture, two data transfers per clock cycle
	M13S5121632A-2S	705Kb / 48P	Double-data-rate architecture, two data transfers per clock cycle