Philips Semiconductors

Product data

PCA9560

Dual 5-bit multiplexed 1-bit latched

2003 Jun 27

9

Bus Transactions

Data is transmitted to the PCA9560 registers using Write Byte transfers (see Figures 9 and 10). Data is read from the PCA9560 registers using

Read and Receive Byte transfers (see Figure 11).

D5

D4

D3

D2 D1

X

X

0

1

1

A1

A0

1

0

S0

A

A

A

R/W

D0

slave address

EEPROM byte 0 data

SW00956

0

0

0

000

0

0

P

stop condition

control register

write on EEPROM byte 0

acknowledge

from slave

acknowledge

from slave

acknowledge

from slave

start condition

Figure 9. WRITE on 1 EEPROM — assuming WP = 0

D4

D3 D2

D1 D0

D5

D4

D3 D2

D1 D0

X

D5

0

1

1

A1

A0

1

0

S0

A

A

X

R/W

P

X

SW00957

A

slave address

stop condition

start condition

00

00

0

0

0

0

XA

acknowledge

from slave

acknowledge

from slave

control register write on

EEPROM byte 0

EEPROM byte 0 data

EEPROM byte 1 data

Figure 10. WRITE on 2 EEPROMs — assuming WP = 0

SW00958

slave address

no acknowledge

from master

4

3

2

1

0

0

0

1

1

A1 A0

1

0

0

1

1

A1 A0

1

0

S0

A

A

0

R/W

P

S

A

slave address

stop condition

start condition

111

1

1

1

1

1

0

NA

acknowledge

from master

control register read

MUX_IN values

data from MUX_IN

acknowledge

from master

acknowledge

from master

1

R/W

restart

Figure 11. READ MUX_IN register