SLG46110 datasheet(2/82 Pages) DIALOG

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000-0046110-106

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SLG46110

1.0 Overview

The SLG46110 provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit

design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the

macrocells of the SLG46110. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a

very small, low power single integrated circuit. The macrocells in the device include the following:

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Two Analog Comparators (ACMP)

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Voltage References (Vref)

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Four Combinatorial Look Up Tables (LUTs)

• Two 2-bit LUTs

• Two 3-bit LUTs

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Seven Combination Function Macrocell

• Two Selectable DFF/Latch or 2-bit LUTs

• Two Selectable DFF/Latch or 3-bit LUTs

• One Selectable Pipe Delay or 3-bit LUT

• Pipe Delay – 8 stage / 2 output

• One Selectable Counter/Delay or 4-bit LUT

• One Programmable Delay / Deglitch Filter

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Three Counter / Delay Generators (CNT/DLY)

• Three 8-bit counter/delays with external clock/reset

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Four D Flip-Flop / Latches (DFF) (Part of Combination Function Macrocell)

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Pipe Delay – 8 stage/2 output (Part of Combination Function Macrocell)

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One Bandgap

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RC Oscillator (RC OSC)

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Power On Reset (POR)

SLG46110 数据表(PDF) 2 Page - Dialog Semiconductor

SLG46110 数据表(HTML) 2 Page - Dialog Semiconductor

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