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SLG46121V 数据表(PDF) 67 Page - Dialog Semiconductor |
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SLG46121V 数据表(HTML) 67 Page - Dialog Semiconductor |
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67 / 98 page  000-0046121--106 Page 66 of 97 SLG46121 Figure 33. Input Threshold Voltage Vih, Vil vs. Hysteresis at VDD = 5.5 V, Vref = 1000 mV. Gain = 1 Figure 34. Input Threshold Voltage Vih, Vil vs. Gain at Hysteresis = 0, VDD = 5.5 V, Vref = 1000 mV Table 52. Built-in Hysteresis Tolerance. Vhys (mV) VDD=(1.7-1.8) V VDD=(1.89-5.5) V Vref = (50-500) mV Vref = (550-1000) mV Vref = (1050-1200) mV Vref = (50-500) mV Vref = (550-1000) mV Vref = (1050-1200) mV min max min max min max min max min max min max 25 18.9 26.4 17.3 26.1 13.0 24.6 18.8 26.5 17.8 26.1 15.6 25.5 50 40.3 50.4 37.9 50.1 28.9 47.7 40.3 50.5 39.5 50.1 34.5 49.5 200 180.5 208.4 172.9 210.7 153.5 217.2 180.6 207.7 180.2 210.8 166.5 211.9 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 0 25 50 200 HYSTERESIS (mV) Vih @ +85ºC Vih @ -35ºC Vil @ +85ºC Vil @ -35ºC -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 35 40 45 1 0.5 0.33 0.25 GAIN Vih @ +85ºC Vih @ -35ºC Vil @ +85ºC Vil @ -35ºC |
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