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AD5560JSVUZ 数据表(PDF) 64 Page - Analog Devices |
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AD5560JSVUZ 数据表(HTML) 64 Page - Analog Devices |
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64 / 67 page ![]() Data Sheet AD5560 Rev. E | Page 63 of 66 APPLICATIONS INFORMATION THERMAL CONSIDERATIONS Table 28. Thermal Resistance for TQFP_EP1 Cooling Airflow (LFPM) θ JA 2 θ JC (Uniform) 3 θ JC (Local) 4 Ideal TIM6 θJC(Local) w/TIM6 θJCP w/TIM5 Unit No Heat Sink 0 39 N/A °C/W 200 37.2 °C/W 500 35.7 °C/W Heat Sink7 0 12.2 N/A °C/W 200 11.1 1.0 2.8 4.91 °C/W 500 9.5 °C/W Cold Plate8 N/A N/A 1.0 2.8 4.91 7.5 °C/W 1 All numbers are simulated and assume a JEDEC 4-layer test board. 2 θ JA is the thermal resistance from hottest junction to ambient air. 3 θ JC (Uniform) is the thermal resistance from junction to the package top, assuming total power is uniformly distributed. 4 θ JC (Local) is the thermal resistance from junction to the center of package top, assuming total power = 8.5 W (1 W uniformly distributed, 7.5 W in power stages—local heating). 5 θ JCP is the thermal resistance from hottest junction to infinite cold plate with consideration of thermal interface material (TIM). 6 Ideal TIM is assuming top of package in perfect contact with an infinite cold plate. w/TIM is assuming TIM is 0.5 mm thick, with thermal conductivity of 2.56 W/m/k. 7 Heat sink with a rated performance of θ CA ~5.3°C/W under forced convection, gives ~TJ = 111°C at 500 LFM. Thermal performance of the package depends on the heat sink and environmental conditions. 8 Attached infinite cold plate should be ≤26°C to maintain T J < 90°C, given total power = 8.5 W. Thermal performance of the package depends on the heat sink and environmental conditions. 9 To estimate junction temperature, the following equations can be used: TJ = Tamb + θJA × Power TJ = Tcoldplate + θJCP × Power TJ = Ttop + θJC × Power Table 29. Thermal Resistance for Flip Chip BGA1 Cooling Airflow (LFPM) θ JA 2 θ JC (Uniform) 3 θ JC (Local) 4 Ideal TIM6 θ JC (Local) w/TIM6 θ JCP 5 w/TIM Unit No Heat Sink 0 40.8 N/A °C/W 200 38.1 °C/W 500 36 °C/W Heat Sink8 0 18 N/A °C/W 200 11.8 0.05 1.6 4.6 °C/W 500 9 °C/W Cold Plate9 N/A N/A 0.05 1.6 4.6 6.5 °C/W 1 All numbers are simulated and assume a JEDEC 4-layer test board. 2 θ JA is the thermal resistance from hottest junction to ambient air. 3 θ JC (Uniform) is the thermal resistance from junction to the package top, assuming total power is uniformly distributed. 4 θ JC (Local) is the thermal resistance from junction to the center of package top, assuming total power = 8.5 W (1 W uniformly distributed, 7.5 W in power stages—local heating). 5 θ JCP is the thermal resistance from hottest junction to infinite cold plate with consideration of thermal interface material (TIM). 6 Ideal TIM is assuming top of package in perfect contact with an infinite cold plate. w/TIM is assuming TIM is 0.4 mm thick, with thermal conductivity of 3.57 W/m/k. 7 Heat sink with a rated performance of θ CA ~4.9°C/W under forced convection, gives ~TJ = 112°C at 500 LFM. Thermal performance of the package depends on the heat sink and environmental conditions. 8 Attached infinite cold plate should be ≤30°C to maintain T J < 90°C, given total power = 8.5 W. Thermal performance of the package depends on the heat sink and environmental conditions. 9 To estimate junction temperature, the following equations can be used: TJ = Tamb + θJA × Power TJ = Tcoldplate + θJCP × Power TJ = Ttop + θJC × Power |
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