256-Channel, 16-Bit,

Charge-to-Digital AFE on Flex

Data Sheet

ADAS1256

Rev. Sp0

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FEATURES

256-channel, charge-to-digital conversion on a single chip

16-bit resolution with no missing codes

Simultaneous sampling

User adjustable full-scale range up to 32 pC

Down to 22 µs line time

INL ± 2.5 LSB or 57.5 ppm, ADC included

Multiple functional power modes: 1 mW/channel to

3 mW/channel

Multiple power-down and sleep modes:

down to 0.005 mW/channel

Measurement of electron or hole collected charge

Tested and delivered on high density system on flex (SOF)

LVDS/CMOS self-clocked serial interface

SPI daisy-chain configuration registers

On-board AFE timing sequencer

On-board temperature sensor and reference buffer

APPLICATIONS

Digital X-ray panel

Photodiode sensors array

CT scanner

High channel count, data acquisition systems (current or

voltage input)

GENERAL DESCRIPTION

The ADAS1256 is a 256-channel, 16-bit, digital X-ray analog

front end (AFE) that integrates the complete charge-to-digital

conversion signal chain on a single chip. It enables a wide range

of digital X-ray modalities, including portable radiology and

mammography as well as high speed fluoroscopy and cardiac

imaging. The ADAS1256 is delivered on a high density system-

on-flex (SOF) package that can be directly mounted on a digital

X-ray panel.

All converted channel results are output on a single LVDS

self-clocked serial interface that significantly reduces external

hardware.

An SPI-compatible serial interface allows configuration of the

AFE, using the SDI input. The SDO output allows the user to

daisy-chain several AFEs on a single 3-wire bus.

An integrated AFE timing sequencer controls the sampling activity

of the analog front end (AFE). The sequencer is programmed via

the SPI port and is timed by a single clock, ACLK.

FUNCTIONAL BLOCK DIAGRAM

REF_ADC

CDS

CDS

DATA

PROCESSING

CDS

CDS

DOUTA/DOUTB

SDI

SDO

SCK

CS

DCLK

SYNC

IOVDD

IOGND

SDI

TO NEXT SDI

VIO

FPGA

4.096V

TO ALL AFEs

RESET

IFS

IFS

IFS

IFS

AVSSI

REF_TFT

TFT PANEL

VT

ACLK

TO ADCs AND DAC

IN255

IN0

IN127

IN128

–VBIAS

SOF

AVDDI

AVDD5F

AVDD5B

DVDD5

DVDD

AVDD

ADC

ADC

LVDS/CMOS

INTERFACE

SYSTEM

MOTHERBOARD

FROM DOUT

OF OTHER AFEs

FROM PREVIOUS

SDO

CONFIGURATION

Figure 1.