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INA231AIYFFR 数据表(PDF) 21 Page - Texas Instruments

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部件名 INA231AIYFFR
功能描述  High- or Low-Side Measurement, Bidirectional Current and Power Monitor With 1.8-V I2C Interface
PDF  44 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

INA231AIYFFR 数据表(HTML) 21 Page - Texas Instruments

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INA231
www.ti.com
SBOS644B – FEBRUARY 2013 – REVISED AUGUST 2017
Product Folder Links: INA231
Submit Documentation Feedback
Copyright © 2013–2017, Texas Instruments Incorporated
8.5.5.2 High-Speed I2C Mode
When the bus is idle, both the SDA and SCL lines are pulled high by the pull-up devices. The master generates
a start condition followed by a valid serial byte containing High-Speed (HS) master code 00001XXX. This
transmission is made in fast (400 kHz) or standard (100 kHz) (F/S) mode at no more than 400 kHz. The INA231
does not acknowledge the HS master code, but does recognize it and switches its internal filters to support 2.5-
MHz operation.
The master then generates a repeated start condition (a repeated start condition has the same timing as the start
condition). After this repeated start condition, the protocol is the same as F/S mode except that transmission
speeds up to 2.5 MHz are allowed. Instead of using a stop condition, use repeated start conditions to secure the
bus in HS-mode. A stop condition ends the HS-mode and switches all the internal filters of the INA231 to support
the F/S mode. A bus timing diagram is shown in Figure 1.
8.5.6 SMBus Alert Response
The INA231 is designed to respond to the SMBus alert response address. The SMBus alert response provides a
quick fault identification for simple slave devices. When an alert occurs, the master can broadcast the alert
response slave address (0001 100) with the Read/Write bit set high. Following this alert response, any slave
devices that generated an alert identify themselves by acknowledging the alert response and sending their
respective address on the bus.
The alert response can activate several different slave devices simultaneously, similar to the I2C general call. If
more than one slave attempts to respond, bus arbitration rules apply. The losing device does not generate an
acknowledge and continues to hold the ALERT line low until the interrupt is cleared.



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