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TS5MP645YFPR 数据表(PDF) 7 Page - Texas Instruments

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部件名 TS5MP645YFPR
功能描述  4-Data Lane 2:1 MIPI Switch (10-Channel, 2:1 Analog Switch)
PDF  31 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TS5MP645YFPR 数据表(HTML) 7 Page - Texas Instruments

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TS5MP645
www.ti.com
SCDS385 – JANUARY 2018
Product Folder Links: TS5MP645
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
Electrical Characteristics (continued)
Over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tOFF_OE
Device disable time OE to switch off
VDD = 1.65 V to 5.5 V
Dn, CLKn = 0.6 V
DAn, DBn, CLKAn, CLKBn: RL= 50 Ω, CL= 1 pF
0.5
1
µs
tOFF_VDD
Device disable time VDD to switch off
VDD = 5 V to 0 V
VDD ramp rate = 250 µs
Dn, CLKn = 0.6 V
DAn, DBn, CLKAn, CLKBn: RL = 50 Ω, CL = 1pF
0.5
1
ms
tMIN_OE
Minimum pulse width for OE
VDD = 1.65 V to 5.5 V
Dn, CLKn = 0.6 V
DAn, DBn, CLKAn, CLKBn: RL = 50 Ω, CL = 1 pF
500
ns
tBBM
Break before make time
VDD = 1.65 V to 5.5 V
OE = 0 V
Dn, CLKn = RL = 50 Ω, CL = 1 pF
DAn, DBn, CLKAn, CLKBn: 0.6 V
50
ns
tSKEW
Intrapair skew
VDD = 1.65 V to 5.5 V
OE = 0 V
Dn, CLKn = 0.3 V
DAn, DBn, CLKAn, CLKBn: RL = 50 Ω, CL = 1 pF
1
ps
tSKEW
Interpair Skew
VDD = 1.65 V to 5.5 V
OE = 0 V
Dn, CLKn = 0.3 V
DAn, DBn, CLKAn, CLKBn: RL = 50 Ω, CL = 1 pF
4
ps
tPD
Propagation delay with 100 ps rise time
VDD = 1.65 V to 5.5 V
OE = 0 V
Dn, CLKn = 0.6 V
DAn, DBn, CLKAn, CLKBn: RL = 50 Ω, CL = 1 pF
tRISE = 100 ps
40
ps
OISO
Differential off isolation
VDD = 1.65 V
OE = 0 V, VDD
SEL = 0 V, VDD
Dn, CLKn, DAn, DBn, CLKAn, CLKBn: RS = 50 Ω,
RL = 50 Ω, CL = 1 pF
VI/O = 200 mV + 200 mVPP (differential)
f = 1250 MHz
-20
dB
XTALK
Differential channel to channel crosstalk
VDD = 1.65 V to 5.5 V
OE = 0 V, VDD
SEL = 0 V, VDD
Dn, CLKn, DAn, DBn, CLKAn, CLKBn: RS = 50 Ω,
RL = 50 Ω, CL = 1 pF
VI/O = 200 mV + 200 mVPP (differential)
f = 1250 MHz
-40
dB
BW
Differential Bandwidth
VDD = 1.65 V to 5.5 V
OE = 0 V
SEL = 0 V, VDD
Dn, CLKn, DAn, DBn, CLKAn, CLKBn: RS = 50 Ω,
RL = 50 Ω, CL = 1 pF
VI/O = 200 mV + 200 mVPP (differential)
1.5
2
GHz
ILOSS
Insertion Loss
VDD = 1.65 V to 5.5 V
OE = 0 V
SEL = 0 V, VDD
Dn, CLKn, DAn, DBn, CLKAn, CLKBn: RS = 50 Ω,
RL = 50 Ω, CL = 1 pF
VI/O = 200 mV + 200 mVPP (differential)
f = 100 kHz
-0.4
dB
COFF
Off capacitance
VDD = 1.65 V to 5.5 V
OE = 0 V, VDD
SEL = 0 V, VDD
Dn, CLKn, DAn, DBn, CLKAn, CLKBn = 0 V , 0.2 V
f = 1250 MHz
1.5
pF
CON
On capacitance
VDD = 1.65 V to 5.5 V
OE = VDD
SEL = 0 V, VDD
Dn, CLKn, DAn, DBn, CLKAn, CLKBn = 0 V , 0.2 V
f = 1250 MHz
1.5
pF



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