2004 Mar 22

10

Philips Semiconductors

Product specification

Quad 2-input NAND gate (open drain)

74LVC38A

UNIT

QZ

y

w

v

θ

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC

JEDEC

JEITA

mm

0.21

0.05

1.80

1.65

0.25

0.38

0.25

0.20

0.09

6.4

6.0

5.4

5.2

0.65

1.25

0.2

7.9

7.6

1.03

0.63

0.9

0.7

1.4

0.9

8

0

o

o

0.13

0.1

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

SOT337-1

99-12-27

03-02-19

(1)

D

E

Z

e

c

X

A

y

1

7

14

8

θ

A

Q

detail X

L

(A )

3

MO-150

pin 1 index

0

2.5

5 mm

scale

SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm

SOT337-1

A

max.

2