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AD7228LPZ 数据表(PDF) 6 Page - Analog Devices

部件名 AD7228LPZ
功能描述  LC2MOS Octal 8-Bit DAC
PDF  16 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD7228LPZ 数据表(HTML) 6 Page - Analog Devices

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Data Sheet
AD7228
Rev. D | Page 5 of 15
SWITCHING CHARACTERISTICS
See Figure 8 and Figure 2; VDD = 5 V ± 5% or 10.8 V to 16.5 V; VSS = 0 V or –5 V ± 10%. Sample tested at 25°C to ensure compliance. All
input rise and fall times measured from 10% to 90% of 5 V, tR = tF = 5 ns. Timing measurement reference level is (VINH + VINL)/2.
Table 3.
Parameter
Limit at 25°C,
All Grades
Limit at TMIN, TMAX,
K, L, B, and C Versions
Unit
Description
t1
0
0
ns min
Address to WR setup time
t2
0
0
ns min
Address to WR hold time
t3
70
90
ns min
Data valid to WR setup time
t4
10
10
ns min
Data valid to WR hold time
t5
95
120
ns min
Write pulse width
t2
5V
0V
5V
VINH
VINL
0V
5V
0V
WR
ADDRESS
NOTES
1. THE SELECTED INPUT LATCH IS TRANSPARENT WHILE WR
IS LOW, THUS INVALID DATA DURING THIS TIME CAN
CAUSE SPURIOUS OUTPUTS.
DATA
t4
t1
t5
t3
Figure 2. Write Cycle Timing Diagram



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