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MCP6S21 数据表(PDF) 2 Page - Microchip Technology

部件名 MCP6S21
功能描述  Single-Ended, Rail-to-Rail I/O, Low Gain PGA
PDF  43 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

MCP6S21 数据表(HTML) 2 Page - Microchip Technology

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MCP6S21/2/6/8
DS21117A-page 2
 2003 Microchip Technology Inc.
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
VDD - VSS .........................................................................7.0V
All inputs and outputs....................... VSS - 0.3V to VDD +0.3V
Difference Input voltage ........................................ |VDD - VSS|
Output Short Circuit Current...................................continuous
Current at Input Pin
.............................................................±2mA
Current at Output and Supply Pins
................................ ±30 mA
Storage temperature .....................................-65°C to +150°C
Junction temperature .................................................. +150°C
ESD protection on all pins (HBM;MM)
.................. ≥ 2 kV; 200V
† Notice: Stresses above those listed under "Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operation listings of this specification is not implied. Exposure
to maximum rating conditions for extended periods may affect
device reliability.
PIN FUNCTION TABLE
Name
Function
VOUT
Analog Output
CH0-CH7
Analog Inputs
VSS
Negative Power Supply
VDD
Positive Power Supply
SCK
SPI Clock Input
SI
SPI Serial Data Input
SO
SPI Serial Data Output
CS
SPI Chip Select
VREF
External Reference Pin
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, TA =+25°C, VDD = +2.5V to +5.5V, VSS = GND, VREF = VSS, G = +1 V/V,
Input = CH0 = (0.3V)/G, CH1 to CH7 = 0.3V, RL =10 kΩ to VDD/2, SI and SCK are tied low and CS is tied high.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Amplifier Input
Input Offset Voltage
VOS
-275
+275
µV
G = +1, VDD = 4.0V
Input Offset Voltage Drift
∆VOS/∆TA
—±4
µV/°C
TA = -40 to +85°C
Power Supply Rejection Ratio
PSRR
70
85
dB
G = +1 (Note 1)
Input Bias Current
IB
±1
pA
CHx = VDD/2
Input Bias Current over
Temperature
IB
250
pA
TA = -40 to +85°C,
CHx = VDD/2
Input Impedance
ZIN
—1013||15
Ω||pF
Input Voltage Range
VIVR
VSS−0.3
VDD+0.3
V
Amplifier Gain
Nominal Gains
G
1 to 32
V/V
+1, +2, +4, +5, +8, +10, +16 or +32
DC Gain Error
G = +1
gE
-0.1
+0.1
%
VOUT ≈ 0.3V to VDD − 0.3V
G
≥ +2
gE
-1.0
+1.0
%
VOUT ≈ 0.3V to VDD − 0.3V
DC Gain Drift
G = +1
∆G/∆TA
±0.0002
%/°C
TA = -40 to +85°C
G
≥ +2
∆G/∆TA
±0.0004
%/°C
TA = -40 to +85°C
Internal Resistance
RLAD
3.4
4.9
6.4
k
(Note 1)
Internal Resistance over
Temperature
∆RLAD/∆TA
—+0.028
%/°C
(Note 1)
TA = -40 to +85°C
Amplifier Output
DC Output Non-linearity G = +1
VONL
±0.003
% of FSR VOUT = 0.3V to VDD − 0.3V, VDD = 5.0V
G
≥ +2
VONL
±0.001
% of FSR VOUT = 0.3V to VDD − 0.3V, VDD = 5.0V
Maximum Output Voltage Swing
VOH, VOL VSS+20
VDD-100
mV
G
≥ +2; 0.5V output overdrive
VSS+60
VDD-60
G
≥ +2; 0.5V output overdrive,
VREF = VDD/2
Short-Circuit Current
IO(SC)
—±30
mA
Note 1: RLAD (RF + RG in Figure 4-1) connects VREF, VOUT and the inverting input of the internal amplifier. The MCP6S22 has
VREF tied internally to VSS, so VSS is coupled to the internal amplifier and the PSRR spec describes PSRR+ only. We
recommend the MCP6S22’s VSS pin be tied directly to ground to avoid noise problems.
2: IQ includes current in RLAD (typically 60 µA at VOUT = 0.3V). Both IQ and IQ_SHDN exclude digital switching currents.
3: The output goes Hi-Z and the registers reset to their defaults; see Section 5.4, “Power-On Reset”.



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