ICS84330 datasheet(9/19 Pages) ICST

9 / 19 page

84330BV

www.icst.com/products/hiperclocks.html

REV. B JULY 26, 2004

Integrated

Circuit

Systems, Inc.

ICS84330

700MHZ, LOW JITTER, CRYSTAL-TO-3.3V

DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER

200

300

600

700

400

500

Output Frequency (MHz)

N = 1

Spec Limit

LVCMOS TO XTAL INTERFACE

The XTAL1 input can accept single ended LVCMOS signal

through an AC couple capacitor. A general interface diagram

is shown in

Figure 4. The XTAL2 input can be left floating. The

edge rate can be as slow as 10ns. If the incoming signal has

sharp edge rate and the signal path is a long trace, proper

termination for the driver and controlled characteristic imped-

Crystal Input Interface

XTAL1

XTAL2

0.1uF

LVCMOS_Driver

VDD

Figure 4. GENERAL DIAGRAM FOR LVCMOS DRIVER TO XTAL INPUT INTERFACE

ance trace may be required. The input can function with half

swing amplitude. Reducing amplitude from full swing of 3.3V

to half swing of about 1.65V can prevent signal interfere with

power rail and may reduce noise. Please refer to the LVCMOS

driver data sheet and application note for amplitude reduction

and termination approach.

FIGURE 5. CYCLE-TO-CYCLE JITTER VS. fOUT (using a 16MHz XTAL)

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