SN74LVC1G38DBVT datasheet(1/12 Pages) TI

部件名	SN74LVC1G38DBVT

功能描述	SINGLE 2-INPUT NAND GATE WITH OPEN-DRAIN OUTPUT

PDF	12 Pages

Scroll/Zoom	100%

制造商	TI [Texas Instruments]

网页	http://www.ti.com

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1 / 12 page

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FEATURES

DBV OR DCK PACKAGE

(TOP VIEW)

1

2

3

5

4

A

B

GND

VCC

Y

3

2

1

4

5

GND

B

A

Y

VCC

YEP OR YZP PACKAGE

(BOTTOM VIEW)

DESCRIPTION/ORDERING INFORMATION

SN74LVC1G38

SINGLE 2-INPUT NAND GATE

WITH OPEN-DRAIN OUTPUT

SCES538A – JANUARY 2004 – REVISED APRIL 2005

•

Available in the Texas Instruments

NanoStar™ and NanoFree™ Packages

•

Supports 5-V VCC Operation

•

Inputs Accept Voltages to 5.5 V

•

Max tpd of 4.5 ns at 3.3 V

•

Low Power Consumption, 10-

µA Max I

CC

•

±24-mA Output Drive at 3.3 V

•

Ioff Supports Partial-Power-Down Mode

Operation

•

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

•

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

The SN74LVC1G38 is designed for 1.65-V to 5.5-V VCC operation.

This device is a single two-input NAND buffer gate with open-drain output. It performs the Boolean function

Y = A

⋅ B or Y = A + B in positive logic.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

ORDERING INFORMATION

TA

PACKAGE(1)

ORDERABLE PART NUMBER

TOP-SIDE MARKING(2)

NanoStar™ – WCSP (DSBGA)

SN74LVC1G38YEPR

0.23-mm Large Bump – YEP

Reel of 3000

_ _ _D7_

NanoFree™ – WCSP (DSBGA)

SN74LVC1G38YZPR

0.23-mm Large Bump – YZP (Pb-free)

–40°C to 85°C

Reel of 3000

SN74LVC1G38DBVR

SOT (SOT-23) – DBV

C38_

Reel of 250

SN74LVC1G38DBVT

Reel of 3000

SN74LVC1G38DCKR

SOT (SC-70) – DCK

D7_

Reel of 250

SN74LVC1G38DCKT

(1)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2)

DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.

YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,

⋅ = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

类似零件编号 - SN74LVC1G38DBVT

制造商	部件名	数据表	功能描述
Texas Instruments	SN74LVC1G38DBVT	1Mb / 21P	Single 2-Input NAND Gate With Open-Drain Output
	SN74LVC1G38DBVT	723Kb / 19P	Single 2-Input NAND Gate With Open-Drain Output
	SN74LVC1G38DBVT	1Mb / 34P	Single 2-Input NAND Gate With Open-Drain Output
	SN74LVC1G38DBVT	2Mb / 38P	Single 2-Input NAND Gate With Open-Drain Output
	SN74LVC1G38DBVT	1Mb / 37P	SN74LVC1G38 Single 2-Input NAND Gate With Open-Drain Output REVISED FEBRUARY 2020

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