EMIF03-SIM01

5/11

TEST BOARD

EMI03

SIM01

50

Ω

Vg

50

Ω

Fig. A2: Measurements conditions

In addition with the filtering the EMIF03-SIM01 is particularly optimized to perform ESD protection.

ESD protection is based on the use of device which clamps at:

VV

R I

cl

br

d

pp

=+

⋅

This protection function is splitted in 2 stages. As shown in Figure A3, the ESD strikes are clamped by the

first stage S1 and then its remaining overvoltage is applied to the second stage through the resistor R.

Such a configuration makes the output voltage very low at the Vout level.

ESD PROTECTION

EMIF03-SIM01

S1

R = 100

or 47

ΩΩ

S2

Rg

Rd

Rd

Vg

R load

ESD Surge

Device

to be

protected

Vin

Vout

Fig. A3: ESD clamping behavior